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yinren13:
说的便捷的视频会议,我们公司的遥控器一按就能开始的视频会议tu ...
便捷视频会议 -
xujinquan19:
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可视通讯与移植、跨平台开发 -
xujinquan19:
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Android 平台下的即时通讯 -
xujinquan19:
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Android 平台下的即时通讯 -
xujinquan19:
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Android 平台下的即时通讯
3.17.1 ARM Options
These `-m' options are defined for Advanced RISC Machines (ARM) architectures:
-mabi=
name -mapcs-frame
-mapcs
-mthumb-interwork
-mno-sched-prolog
-mfloat-abi=
name Specifying `soft' causes GCC to generate output containing library calls for floating-point operations. `softfp' allows the generation of code using hardware floating-point instructions, but still uses the soft-float calling conventions. `hard' allows generation of floating-point instructions and uses FPU-specific calling conventions.
The default depends on the specific target configuration. Note that the hard-float and soft-float ABIs are not link-compatible; you must compile your entire program with the same ABI, and link with a compatible set of libraries.
-mlittle-endian
-mbig-endian
-mwords-little-endian
-mcpu=
name -mtune=
name -march=
name -mfpu=
name -mfpe=
number -mfp=
number If -msoft-float is specified this specifies the format of floating point values.
If the selected floating-point hardware includes the NEON extension (e.g. -mfpu=`neon'), note that floating-point operations will not be used by GCC's auto-vectorization pass unless -funsafe-math-optimizations is also specified. This is because NEON hardware does not fully implement the IEEE 754 standard for floating-point arithmetic (in particular denormal values are treated as zero), so the use of NEON instructions may lead to a loss of precision.
-mfp16-format=
name __fp16
half-precision floating-point type. Permissible names are `none', `ieee', and `alternative'; the default is `none', in which case the __fp16
type is not defined. See Half-Precision, for more information. -mstructure-size-boundary=
n Specifying the larger number can produce faster, more efficient code, but can also increase the size of the program. Different values are potentially incompatible. Code compiled with one value cannot necessarily expect to work with code or libraries compiled with another value, if they exchange information using structures or unions.
-mabort-on-noreturn
abort
at the end of a noreturn
function. It will be executed if the function tries to return. -mlong-calls
-mno-long-calls
Even if this switch is enabled, not all function calls will be turned into long calls. The heuristic is that static functions, functions which have the `short-call' attribute, functions that are inside the scope of a `#pragma no_long_calls' directive and functions whose definitions have already been compiled within the current compilation unit, will not be turned into long calls. The exception to this rule is that weak function definitions, functions with the `long-call' attribute or the `section' attribute, and functions that are within the scope of a `#pragma long_calls' directive, will always be turned into long calls.
This feature is not enabled by default. Specifying -mno-long-calls will restore the default behavior, as will placing the function calls within the scope of a `#pragma long_calls_off' directive. Note these switches have no effect on how the compiler generates code to handle function calls via function pointers.
-msingle-pic-base
-mpic-register=
reg -mcirrus-fix-invalid-insns
-mpoke-function-name
t0 .ascii "arm_poke_function_name", 0 .align t1 .word 0xff000000 + (t1 - t0) arm_poke_function_name mov ip, sp stmfd sp!, {fp, ip, lr, pc} sub fp, ip, #4
When performing a stack backtrace, code can inspect the value of pc
stored at fp + 0
. If the trace function then looks at location pc - 12
and the top 8 bits are set, then we know that there is a function name embedded immediately preceding this location and has length ((pc[-3]) & 0xff000000)
.
-mthumb
-mtpcs-frame
-mtpcs-leaf-frame
-mcallee-super-interworking
-mcaller-super-interworking
-mtp=
name __aeabi_read_tp
, cp15, which fetches the thread pointer from cp15
directly (supported in the arm6k architecture), and auto, which uses the best available method for the selected processor. The default setting is auto. -mword-relocations
-mfix-cortex-m3-ldrd
ldrd
instructions with overlapping destination and base registers are used. This option avoids generating these instructions. This option is enabled by default when -mcpu=cortex-m3 is specified. 发表评论
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